Multiple transmit (Tx) and multiple receive (Rx) systems have received considerable attention in recent years as they offer substantial capacity improvements over conventional single-input single-output (SISO) systems. They have been proposed to achieve higher data rates, e.g. in wireless communication systems, with no penalty in either power or bandwidth. Multiple transmit (Tx) and multiple receive (Rx) antenna systems are referred to as multiple input multiple output (MIMO) systems.
FIG. 1 shows a schematic block diagram of a conventional Cartesian transmitter device, wherein digital I- and Q-data output by a digital processing unit or the like are digital-to-analog (DA) converted at respective digital-to-analog converters (DACs) 12, 14, low-pass filtered at respective low-pass filters (LPF) 22, 24 (which may be tunable by a tuning signal), and up-converted by respective I- and Q-mixers 32, 34. At radio frequency (RF) level the up-converted I- and Q-streams are combined by a combining element 38 (e.g. an adder circuit or the like) and amplified by a power amplifier (PA) 40 before radiated at an antenna 50.
In the architecture of FIG. 1, I- and Q-signal are thus converted from digital to analog signals, low-pass filtered to remove alias components, and mixed with I- and Q-LO (local oscillator) signals in a single transmission path, branch, or chain. After addition and amplification the signal is radiated at the antenna 50.
Based on such a Cartesian transmitter a dual transmit architecture (e.g. 2*TX MIMO) can be realized by adding another transmission path, branch, or chain, which then consists of two more DACs, LPFs, mixers, and another PA. A voltage controlled oscillator (VCO) and/or a phase locked loop (PLL) circuit (not shown in FIG. 1) provided for generating the I- and Q-LO signals can be re-used, as the Tx frequency for both transmitter chains is the same.
However, the Cartesian transmitter suffers from the disadvantage that is not the most power efficient architecture. Therefore, transmitter architectures have been investigated so as to provide a more efficient transmitter implementation.
FIG. 2 shows a polar transmitter architecture which has a higher efficiency than the above Cartesian transmitter architecture. The base-band information is now provided in the form of polar signals, i.e., an (instantaneous) amplitude signal r(t) and an (instantaneous) phase signal phi(t). By modulating an oscillator circuit 60 (e.g. a PLL/VCO circuit) with the phase component, and adding the amplitude component somewhere else in the RF transmission path, branch, or chain, e.g. by controlling a PA 42, a (data-) modulated signal can be radiated at the antenna 50. The envelope and phase information can be derived from the I- and Q-signal by the following equations:r(t)=sqrt[si2(t)+sq2(t)] and  (1)phi(t)=tan−1[sq(t)/si(t)]  (2)Thus, a dual-transmit polar transmitter (e.g. a 2*TX MIMO polar transmitter) comprises two transmission paths, branches, or chains with two oscillators (e.g. VCO/PLLs) and two amplitude modulators. As the two transmission frequencies are the same, while the modulation at the first oscillator may be completely different from the modulation at the second oscillator, the instantaneous frequencies of the oscillators can be very close together. When these two oscillators are integrated on the same silicon die, coupling between the two oscillators will be present, and may cause huge problems. The signal from the first oscillator may be coupled into the second oscillator and vice-versa. Consequently, requirements concerning error vector magnitude (EVM) and adjacent coupled power ration (ACPR) may not be reached.